[PATCH bpf-next v2 4/8] bpf, riscv: JIT UHMUL and SHMUL on RV64

Björn Töpel bjorn at kernel.org
Thu Oct 22 04:18:00 PDT 2026


tangyazhou at zju.edu.cn writes:

> From: Yazhou Tang <tangyazhou518 at outlook.com>
>
> On RV64, the RISC-V M extension provides MULHU and MULH instructions that
> return the high 64 bits of an unsigned or signed 64-bit multiplication,
> respectively.
>
> Add the missing MULH encoder and use MULHU and MULH to lower the UHMUL and
> SHMUL BPF_MUL variants for both register and immediate sources. Keep the
> existing low-half and ALU32 multiplication lowering unchanged.
>
> Suggested-by: Alexei Starovoitov <alexei.starovoitov at gmail.com>
> Signed-off-by: Yazhou Tang <tangyazhou518 at outlook.com>
> Co-developed-by: Tianci Cao <ziye at zju.edu.cn>
> Signed-off-by: Tianci Cao <ziye at zju.edu.cn>
> Co-developed-by: Shenghao Yuan <shenghaoyuan0928 at 163.com>
> Signed-off-by: Shenghao Yuan <shenghaoyuan0928 at 163.com>

Acked-by: Björn Töpel <bjorn at kernel.org>



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