[PATCH 4/4] PCI: dwc: Add UltraRISC DP1000 PCIe rc driver

Jia Wang wangjia at ultrarisc.com
Fri Mar 20 02:37:17 PDT 2026


On 2026-03-17 05:32 +0000, Yao Zi wrote:
> On Mon, Mar 16, 2026 at 03:07:00PM +0800, Jia Wang via B4 Relay wrote:
> > From: Xincheng Zhang <zhangxincheng at ultrarisc.com>
> > 
> > Add DP1000 soc PCIe rc driver.
> > 
> > Signed-off-by: Xincheng Zhang <zhangxincheng at ultrarisc.com>
> > Signed-off-by: Jia Wang <wangjia at ultrarisc.com>
> > ---
> >  drivers/pci/controller/dwc/Kconfig           |  15 ++
> >  drivers/pci/controller/dwc/Makefile          |   1 +
> >  drivers/pci/controller/dwc/pcie-designware.h |  22 +++
> >  drivers/pci/controller/dwc/pcie-ultrarisc.c  | 202 +++++++++++++++++++++++++++
> >  4 files changed, 240 insertions(+)
> > 
> > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> > index d0aa031397fa..0a33891bf7ef 100644
> > --- a/drivers/pci/controller/dwc/Kconfig
> > +++ b/drivers/pci/controller/dwc/Kconfig
> > @@ -548,4 +548,19 @@ config PCIE_VISCONTI_HOST
> >  	  Say Y here if you want PCIe controller support on Toshiba Visconti SoC.
> >  	  This driver supports TMPV7708 SoC.
> >  
> > +config PCIE_ULTRARISC
> > +	bool "UltraRISC PCIe host controller"
> 
> Is there any reason preventing the driver being built as a module? If
> no, it would be better to change it to "tristate", to allow distribution
> to customize the configuration for image sizes, etc.
>

Thanks for the suggestion. I will update PCIE_ULTRARISC to tristate.
 
> > +	depends on ARCH_ULTRARISC || COMPILE_TEST
> > +	select PCIE_DW_HOST
> > +	select PCI_MSI
> > +	default y if ARCH_ULTRARISC
> > +	help
> > +	  Enables support for the PCIe controller in the UltraRISC SoC.
> > +	  This driver supports UR-DP1000 SoC. When selected, it automatically
> > +	  enables both `PCIE_DW_HOST` and `PCI_MSI`, ensuring proper support
> > +	  for MSI-based interrupt handling in the PCIe controller.
> > +	  By default, this symbol is enabled when `ARCH_ULTRARISC` is active,
> > +	  requiring no further configuration on that platform.
> > +
> > +
> >  endmenu
> >  #define PORT_LOGIC_LTSSM_STATE_L0	0x11
> 
> Best regards,
> Yao Zi
>

Best regards,
Jia 





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