[PATCH v12 3/4] soc: microchip: add mpfs gpio interrupt mux driver

Linus Walleij linusw at kernel.org
Mon Mar 16 02:27:15 PDT 2026


On Wed, Mar 11, 2026 at 4:18 PM Conor Dooley <conor at kernel.org> wrote:

> From: Conor Dooley <conor.dooley at microchip.com>
>
> On PolarFire SoC there are more GPIO interrupts than there are interrupt
> lines available on the PLIC, and a runtime configurable mux is used to
> decide which interrupts are assigned direct connections to the PLIC &
> which are relegated to sharing a line.
>
> Add a driver so that Linux can set the mux based on the interrupt
> mapping in the devicetree.
>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>

Reviewed-by: Linus Walleij <linusw at kernel.org>

We need a piece of accessible documentation that clearly defines
the difference between an IRQ mux and a hierarchical IRQ chip.
If only a post on people.kernel.org, just something to help people
to know when to use which approach.

Yours,
Linus Walleij



More information about the linux-riscv mailing list