[PATCH v2] riscv: asm: use .insn for making custom instructioons
Paul Walmsley
pjw at kernel.org
Thu Oct 23 20:12:51 PDT 2025
Hi Ben,
On Thu, 23 Oct 2025, Ben Dooks wrote:
> The assembler has .insn for building custom instructions
> now, so remove the .4byte which also ensures the output
> is marked as an instruction and not as data (which may
> confuse both debuggers and anything else that relies on
> this sort of marking)
>
> Add an ASM_INSN_I() wrapper in asm.h to allow the selecting
> of how this is output so older assemblers are still good.
>
> Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
> Signed-off-by: Ben Dooks <ben.dooks at codethink.co.uk>
> ---
> v2:
> - fixed #ifndef v #ifdef
> - added custom MIPS instructions too
> -
> ---
> arch/riscv/include/asm/asm.h | 6 ++++++
> arch/riscv/include/asm/insn-def.h | 8 ++++----
> arch/riscv/include/asm/vendor_extensions/mips.h | 6 +++---
> 3 files changed, 13 insertions(+), 7 deletions(-)
>
[ ... ]
> diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/insn-def.h
> index c9cfcea52cbb..a7860e6b908d 100644
> --- a/arch/riscv/include/asm/insn-def.h
> +++ b/arch/riscv/include/asm/insn-def.h
> @@ -256,10 +256,10 @@
> INSN_S(OPCODE_OP_IMM, FUNC3(6), __RS2(3), \
> SIMM12((offset) & 0xfe0), RS1(base))
>
> -#define RISCV_PAUSE ".4byte 0x100000f"
> -#define ZAWRS_WRS_NTO ".4byte 0x00d00073"
> -#define ZAWRS_WRS_STO ".4byte 0x01d00073"
> -#define RISCV_NOP4 ".4byte 0x00000013"
> +#define RISCV_PAUSE ASM_INSN_I("0x100000f")
> +#define ZAWRS_WRS_NTO ASM_INSN_I("0x00d00073")
> +#define ZAWRS_WRS_STO ASM_INSN_I("0x01d00073")
> +#define RISCV_NOP4 ASM_INSN(_U"0x00000013")
This looks garbled. Is this intentional?
> #define RISCV_INSN_NOP4 _AC(0x00000013, U)
>
> diff --git a/arch/riscv/include/asm/vendor_extensions/mips.h b/arch/riscv/include/asm/vendor_extensions/mips.h
> index ea8ca747d691..bcdce3ef3869 100644
> --- a/arch/riscv/include/asm/vendor_extensions/mips.h
> +++ b/arch/riscv/include/asm/vendor_extensions/mips.h
> @@ -30,8 +30,8 @@ extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_mips;
> * allowing any subsequent instructions to fetch.
> */
>
> -#define MIPS_PAUSE ".4byte 0x00501013\n\t"
> -#define MIPS_EHB ".4byte 0x00301013\n\t"
> -#define MIPS_IHB ".4byte 0x00101013\n\t"
> +#define MIPS_PAUSE ASM_INSN_I("0x00501013\n\t")
> +#define MIPS_EHB ASM_INSN_I(".4byte 0x00301013\n\t")
> +#define MIPS_IHB ASM_INSN_I(".4byte 0x00101013\n\t")
Same for the above two lines?
- Paul
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