[PATCH v1 2/7] dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property
Conor Dooley
conor at kernel.org
Thu Oct 16 08:51:33 PDT 2025
On Thu, Oct 16, 2025 at 10:58:41AM +0200, Heinrich Schuchardt wrote:
> On 10/16/25 10:00, Hal Feng wrote:
> > Add enable-gpios property for controlling the PCI bus device power.
> > This property had been supported in the driver but not added in the
> > dt-bindings.
> >
> > Fixes: 22fe32239770 ("dt-bindings: PCI: Add StarFive JH7110 PCIe controller")
> > Signed-off-by: Hal Feng <hal.feng at starfivetech.com>
> > ---
> > .../devicetree/bindings/pci/starfive,jh7110-pcie.yaml | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > index 5f432452c815..f254c7111837 100644
> > --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > @@ -60,6 +60,10 @@ properties:
> > description:
> > The phandle to System Register Controller syscon node.
> > + enable-gpios:
> > + description: GPIO used to enable the PCI bus device power
> > + maxItems: 1
> > +
>
> Shouldn't we try to keep the entries alphabetically ordered?
Grouping the two gpios together also has some value. I don't think it's
particularly important which way it is done.
Acked-by: Conor Dooley <conor.dooley at microchip.com>
pw-bot: not-applicable
>
> Otherwise looks good.
>
> Best regards
>
> Heinrich
>
> > perst-gpios:
> > description: GPIO controlled connection to PERST# signal
> > maxItems: 1
>
>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20251016/40ea2d87/attachment.sig>
More information about the linux-riscv
mailing list