[PATCH v3 5/5] riscv: dts: thead: Add reset controllers of more subsystems for TH1520

[Guo Ren]

On Tue, Oct 14, 2025 at 9:12 PM Yao Zi <ziyao at disroot.org> wrote:
>
> Describe reset controllers for VI, MISC, AP, DSP and AO subsystems. The
> one for AO subsystem is marked as reserved, since it may be used by AON
> firmware.
>
> Signed-off-by: Yao Zi <ziyao at disroot.org>
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 37 +++++++++++++++++++++++++++
>  1 file changed, 37 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index e680d1a7c821..15d64eaea89f 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -277,6 +277,12 @@ clint: timer at ffdc000000 {
>                                               <&cpu3_intc 3>, <&cpu3_intc 7>;
>                 };
>
> +               rst_vi: reset-controller at ffe4040100 {
> +                       compatible = "thead,th1520-reset-vi";
> +                       reg = <0xff 0xe4040100 0x0 0x8>;
> +                       #reset-cells = <1>;
> +               };
> +
>                 spi0: spi at ffe700c000 {
>                         compatible = "thead,th1520-spi", "snps,dw-apb-ssi";
>                         reg = <0xff 0xe700c000 0x0 0x1000>;
> @@ -502,6 +508,18 @@ uart2: serial at ffec010000 {
>                         status = "disabled";
>                 };
>
> +               rst_misc: reset-controller at ffec02c000 {
> +                       compatible = "thead,th1520-reset-misc";
> +                       reg = <0xff 0xec02c000 0x0 0x18>;
> +                       #reset-cells = <1>;
> +               };
> +
> +               rst_vp: reset-controller at ffecc30000 {
> +                       compatible = "thead,th1520-reset-vp";
> +                       reg = <0xff 0xecc30000 0x0 0x14>;
> +                       #reset-cells = <1>;
> +               };
> +
>                 clk: clock-controller at ffef010000 {
>                         compatible = "thead,th1520-clk-ap";
>                         reg = <0xff 0xef010000 0x0 0x1000>;
> @@ -509,6 +527,18 @@ clk: clock-controller at ffef010000 {
>                         #clock-cells = <1>;
>                 };
>
> +               rst_ap: reset-controller at ffef014000 {
> +                       compatible = "thead,th1520-reset-ap";
> +                       reg = <0xff 0xef014000 0x0 0x1000>;
> +                       #reset-cells = <1>;
> +               };
> +
> +               rst_dsp: reset-controller at ffef040028 {
> +                       compatible = "thead,th1520-reset-dsp";
> +                       reg = <0xff 0xef040028 0x0 0x4>;
> +                       #reset-cells = <1>;
> +               };
> +
>                 gpu: gpu at ffef400000 {
>                         compatible = "thead,th1520-gpu", "img,img-bxm-4-64",
>                                      "img,img-rogue";
> @@ -681,6 +711,13 @@ aogpio: gpio-controller at 0 {
>                         };
>                 };
>
> +               rst_ao: reset-controller at fffff44000 {
> +                       compatible = "thead,th1520-reset-ao";
> +                       reg = <0xff 0xfff44000 0x0 0x2000>;
> +                       #reset-cells = <1>;
> +                       status = "reserved";
> +               };
> +
>                 padctrl_aosys: pinctrl at fffff4a000 {
>                         compatible = "thead,th1520-pinctrl";
>                         reg = <0xff 0xfff4a000 0x0 0x2000>;
> --
> 2.50.1
>
LGTM!

Acked-by: Guo Ren <guoren at kernel.org>

-- 
Best Regards
 Guo Ren