[PATCH v4] selftests: riscv: add misaligned access testing
Clément Léger
cleger at rivosinc.com
Thu Jul 10 07:10:03 PDT 2025
On 10/07/2025 15:53, Andreas Schwab wrote:
> On Jul 10 2025, Clément Léger wrote:
>
>> This selftest tests all the currently emulated instructions (except for
>> the RV32 compressed ones which are left as a future exercise for a RV32
>> user). For the FPU instructions, all the FPU registers are tested.
>
> If that didn't catch the missing sign extension that I just fixed in
> <https://lore.kernel.org/linux-riscv/mvmikk0goil.fsf@suse.de>, you
> should consider extending the tests.
>
Hi Andreas, you link doesn't work and I didn't find anything about sign
extension except a patch you wrote for arch_cmpxg().
Thanks,
Clément
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