[PATCH v1 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI
Mark Brown
broonie at kernel.org
Wed May 31 06:20:57 PDT 2023
On Wed, May 31, 2023 at 02:19:16PM +0800, William Qiu wrote:
> On 2023/5/30 18:33, Mark Brown wrote:
> > You could always specify a different array of clocks depending on which
> > compatible the driver sees, just like you'd conditionally request clocks
> > individually.
> If specify a different array of clocks depending on which compatible
> the driver sees, since there will also be clock operations in the suspend
> and resume interfaces, this can make the code look complicated.
If you store the clock count and array in the driver data that should be
fairly simple I think.
> as following:
> /* Obtain QSPI clock. */
> cqspi->num_clks = devm_clk_bulk_get_all(dev, &cqspi->clks);
> if (cqspi->num_clks < 0) {
> dev_err(dev, "Cannot claim QSPI clock: %u\n", cqspi->num_clks);
> return -EINVAL;
> }
> This way, the code will look simpler and clearer. How do you think
> about it.
I'm not clear how enable and disable would then work?
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 488 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20230531/266d7d77/attachment.sig>
More information about the linux-riscv
mailing list