[PATCH v2 0/4] RISC-V: Dynamic ftrace support for RV32I

[Andrew Jones]

On Tue, Nov 15, 2022 at 08:08:28PM +0000, Jamie Iles wrote:
> This series enables dynamic ftrace support for RV32I bringing it to 
> parity with RV64I.  Most of the work is already there, this is largely 
> just assembly fixes to handle register sizes, correct handling of the 
> psABI calling convention and Kconfig change.
> 
> Validated with all ftrace boot time self test with qemu for RV32I and 
> RV64I in addition to real tracing on an RV32I FPGA design.
> 
> Changes since v1 
> (http://lists.infradead.org/pipermail/linux-riscv/2022-October/021103.html)
> 
>   - Fixed the use of SZREG in patch 2
> 
> Jamie Iles (4):
>   RISC-V: use REG_S/REG_L for mcount
>   RISC-V: reduce mcount save space on RV32
>   RISC-V: preserve a1 in mcount
>   RISC-V: enable dynamic ftrace for RV32I
> 
>  arch/riscv/Kconfig         | 10 ++++-----
>  arch/riscv/kernel/mcount.S | 44 ++++++++++++++++++++------------------
>  2 files changed, 28 insertions(+), 26 deletions(-)

Hi Jamie,

Please CC previous reviewers on the entire series when reposting.

Thanks,
drew

> 
> -- 
> 2.37.2
> 
> 
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