[PATCH v5 7/7] riscv: configs: defconfig: Enable Renesas RZ/Five SoC
Lad, Prabhakar
prabhakar.csengg at gmail.com
Tue Nov 8 08:06:44 PST 2022
Hi Geert,
Thank you for the review.
On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert at linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg at gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
> >
> > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > upstream kernel to boot on RZ/Five SMARC EVK board.
> >
> > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > RZ/Five SoC is built-in.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
> > Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>
> > ---
> > v4 -> v5
> > * No change
> >
> > v3 -> v4
> > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > tags with this change)
> > * Used riscv instead of RISC-V in subject line
>
> Thanks for the update!
>
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > CONFIG_SOC_SIFIVE=y
> > CONFIG_SOC_STARFIVE=y
> > CONFIG_SOC_VIRT=y
> > +CONFIG_ARCH_RENESAS=y
> > +CONFIG_ARCH_R9A07G043=y
>
> You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
>
Sorry I missed your point here, could you please elaborate.
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> > CONFIG_PM=y
>
> PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> resp. SOC_RENESAS, so they can be dropped. But it's better to do this
> after the release of v6.2-rc1, when all pieces have fallen together.
>
Are you suggesting dropping it from defconfig?
Cheers,
Prabhakar
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