[PATCH v2 0/4] RISC-V: Dynamic ftrace support for RV32I

[Palmer Dabbelt]

On Tue, 15 Nov 2022 20:08:28 +0000, Jamie Iles wrote:
> This series enables dynamic ftrace support for RV32I bringing it to
> parity with RV64I.  Most of the work is already there, this is largely
> just assembly fixes to handle register sizes, correct handling of the
> psABI calling convention and Kconfig change.
> 
> Validated with all ftrace boot time self test with qemu for RV32I and
> RV64I in addition to real tracing on an RV32I FPGA design.
> 
> [...]

Applied, thanks!

[1/4] RISC-V: use REG_S/REG_L for mcount
      https://git.kernel.org/palmer/c/8a6841c439df
[2/4] RISC-V: reduce mcount save space on RV32
      https://git.kernel.org/palmer/c/3bd7743f8d6d
[3/4] RISC-V: preserve a1 in mcount
      https://git.kernel.org/palmer/c/dc58a24db8c1
[4/4] RISC-V: enable dynamic ftrace for RV32I
      https://git.kernel.org/palmer/c/f32b4b467ebd

Best regards,
-- 
Palmer Dabbelt <palmer at rivosinc.com>