[PATCH v10 06/17] mtd: spi-nor: sfdp: get command opcode extension type from BFPT
Tudor.Ambarus at microchip.com
Tudor.Ambarus at microchip.com
Tue Jul 7 13:53:52 EDT 2020
On 6/23/20 9:30 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Some devices in DTR mode expect an extra command byte called the
> extension. The extension can either be same as the opcode, bitwise
> inverse of the opcode, or another additional byte forming a 16-byte
> opcode. Get the extension type from the BFPT. For now, only flashes with
> "repeat" and "inverse" extensions are supported.
>
> Signed-off-by: Pratyush Yadav <p.yadav at ti.com>
> ---
> drivers/mtd/spi-nor/sfdp.c | 17 +++++++++++++++++
> drivers/mtd/spi-nor/sfdp.h | 6 ++++++
> 2 files changed, 23 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
> index cb6e93a3560a..3f709de5ea67 100644
> --- a/drivers/mtd/spi-nor/sfdp.c
> +++ b/drivers/mtd/spi-nor/sfdp.c
> @@ -605,6 +605,23 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
> if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
> return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,
> params);
> + /* 8D-8D-8D command extension. */
> + switch (bfpt.dwords[BFPT_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) {
> + case BFPT_DWORD18_CMD_EXT_REP:
> + nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
> + break;
> +
> + case BFPT_DWORD18_CMD_EXT_INV:
> + nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
> + break;
> +
> + case BFPT_DWORD18_CMD_EXT_RES:
dev_dbg
> + return -EINVAL;
Do we really want to stop the SFDP parsing here and loose everything that
we gathered?
> +
> + case BFPT_DWORD18_CMD_EXT_16B:
> + dev_err(nor->dev, "16-bit opcodes not supported\n");
dev_dbg
> + return -ENOTSUPP;
> + }
>
> return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params);
> }
> diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h
> index 7f9846b3a1ad..6d7243067252 100644
> --- a/drivers/mtd/spi-nor/sfdp.h
> +++ b/drivers/mtd/spi-nor/sfdp.h
> @@ -90,6 +90,12 @@ struct sfdp_bfpt {
> #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20)
> #define BFPT_DWORD15_QER_SR2_BIT1 (0x5UL << 20) /* Spansion */
>
> +#define BFPT_DWORD18_CMD_EXT_MASK GENMASK(30, 29)
> +#define BFPT_DWORD18_CMD_EXT_REP (0x0UL << 29) /* Repeat */
> +#define BFPT_DWORD18_CMD_EXT_INV (0x1UL << 29) /* Invert */
> +#define BFPT_DWORD18_CMD_EXT_RES (0x2UL << 29) /* Reserved */
> +#define BFPT_DWORD18_CMD_EXT_16B (0x3UL << 29) /* 16-bit opcode */
> +
> struct sfdp_parameter_header {
> u8 id_lsb;
> u8 minor;
> --
> 2.27.0
>
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