[PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control

[李志]

> -----原始邮件-----
> 发件人: "Andrew Lunn" <andrew at lunn.ch>
> 发送时间:2026-01-22 21:32:34 (星期四)
> 收件人: 李志 <lizhi2 at eswincomputing.com>
> 抄送: devicetree at vger.kernel.org, andrew+netdev at lunn.ch, davem at davemloft.net, edumazet at google.com, kuba at kernel.org, robh at kernel.org, krzk+dt at kernel.org, conor+dt at kernel.org, netdev at vger.kernel.org, pabeni at redhat.com, mcoquelin.stm32 at gmail.com, alexandre.torgue at foss.st.com, rmk+kernel at armlinux.org.uk, linux-stm32 at st-md-mailman.stormreply.com, linux-arm-kernel at lists.infradead.org, linux-kernel at vger.kernel.org, ningyu at eswincomputing.com, linmin at eswincomputing.com, pinkesh.vaghela at einfochips.com, weishangjuan at eswincomputing.com
> 主题: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control
> 
> > On EIC7700, RXC and RXD experience an internal skew before reaching the
> > MAC. At high speed, this can shift the effective sampling point by
> > approximately half a cycle, causing the MAC to sample the wrong nibble
> > on each edge.
> 
> You say internal. So the skew is fixed, it is a property of the
> silicon? If so, why a DT property? Why not just hard code it in the
> driver? Since it is internal, different boards should not need it set
> differently?
> 
Thanks for the question.

EIC7700 has two Ethernet MACs. Only eth1 has this internal RXC/RXD skew,
eth0 does not.

So this is not a chip-wide constant that can be hardcoded in the driver.
We need a way to distinguish the two MAC instances, which is why this is
described per-port in DTS.

--
Li Zhi