[PATCH] arm64: dts: broadcom: bcm2712: adjust display status

[Stefan Wahren]

Hi Peter,

Am 24.09.25 um 10:57 schrieb Peter Robinson:
> Typically non critical IP in a SoC are disabled by
> default in the SoC .dtsi and enabled on board specific
> configs. There are usecases, such as some CM5 carrier
> boards, where display output may not be desired or
> connected. So disable them on the SoC .dtsi and enable
> them on the RPi5 board.
>
> Signed-off-by: Peter Robinson <pbrobinson at gmail.com>
> Cc: Dave Stevenson <dave.stevenson at raspberrypi.com>
> Cc: Andrea della Porta <andrea.porta at suse.com>
> Fixes: 25d77bdd7df2 ("arm64: dts: broadcom: Add display pipeline support to BCM2712")
I'm fine with this change in general, but I don't think this is a fix. 
Especially there is no CM5 support upstream yet.

Except of this:

Reviewed-by: Stefan Wahren <wahrenst at gmx.net>
> ---
>   .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts  | 31 +++++++++++++++++++
>   arch/arm64/boot/dts/broadcom/bcm2712.dtsi     | 11 +++++++
>   2 files changed, 42 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
> index 6ea3c102e0d67..359c262b8d956 100644
> --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
> +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
> @@ -97,19 +97,42 @@ power: power {
>   	};
>   };
>   
> +&ddc0 {
> +	status = "okay";
> +};
> +
> +&ddc1 {
> +	status = "okay";
> +};
> +
> +&disp_intr {
> +	status = "okay";
> +};
> +
>   &hvs {
>   	clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
>   	clock-names = "core", "disp";
> +	status = "okay";
>   };
>   
>   &hdmi0 {
>   	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
>   	clock-names = "hdmi", "bvb", "audio", "cec";
> +	status = "okay";
>   };
>   
>   &hdmi1 {
>   	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
>   	clock-names = "hdmi", "bvb", "audio", "cec";
> +	status = "okay";
> +};
> +
> +&mop {
> +	status = "okay";
> +};
> +
> +&moplet {
> +	status = "okay";
>   };
>   
>   &pcie1 {
> @@ -119,3 +142,11 @@ &pcie1 {
>   &pcie2 {
>   	status = "okay";
>   };
> +
> +&pixelvalve0 {
> +	status = "okay";
> +};
> +
> +&pixelvalve1 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
> index 4cae17c04b50a..4cd51d80d40d0 100644
> --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
> @@ -287,12 +287,14 @@ pixelvalve0: pixelvalve at 7c410000 {
>   			compatible = "brcm,bcm2712-pixelvalve0";
>   			reg = <0x7c410000 0x100>;
>   			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
>   		};
>   
>   		pixelvalve1: pixelvalve at 7c411000 {
>   			compatible = "brcm,bcm2712-pixelvalve1";
>   			reg = <0x7c411000 0x100>;
>   			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
>   		};
>   
>   		mop: mop at 7c500000 {
> @@ -300,6 +302,7 @@ mop: mop at 7c500000 {
>   			reg = <0x7c500000 0x28>;
>   			interrupt-parent = <&disp_intr>;
>   			interrupts = <1>;
> +			status = "disabled";
>   		};
>   
>   		moplet: moplet at 7c501000 {
> @@ -307,6 +310,7 @@ moplet: moplet at 7c501000 {
>   			reg = <0x7c501000 0x20>;
>   			interrupt-parent = <&disp_intr>;
>   			interrupts = <0>;
> +			status = "disabled";
>   		};
>   
>   		disp_intr: interrupt-controller at 7c502000 {
> @@ -315,6 +319,7 @@ disp_intr: interrupt-controller at 7c502000 {
>   			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>   			interrupt-controller;
>   			#interrupt-cells = <1>;
> +			status = "disabled";
>   		};
>   
>   		dvp: clock at 7c700000 {
> @@ -333,6 +338,7 @@ ddc0: i2c at 7d508200 {
>   			clock-frequency = <97500>;
>   			#address-cells = <1>;
>   			#size-cells = <0>;
> +			status = "disabled";
>   		};
>   
>   		ddc1: i2c at 7d508280 {
> @@ -343,6 +349,7 @@ ddc1: i2c at 7d508280 {
>   			clock-frequency = <97500>;
>   			#address-cells = <1>;
>   			#size-cells = <0>;
> +			status = "disabled";
>   		};
>   
>   		bsc_irq: interrupt-controller at 7d508380 {
> @@ -388,6 +395,7 @@ hdmi0: hdmi at 7c701400 {
>   			interrupt-names = "cec-tx", "cec-rx", "cec-low",
>   					  "hpd-connected", "hpd-removed";
>   			ddc = <&ddc0>;
> +			status = "disabled";
>   		};
>   
>   		hdmi1: hdmi at 7c706400 {
> @@ -417,6 +425,7 @@ hdmi1: hdmi at 7c706400 {
>   			interrupt-names = "cec-tx", "cec-rx", "cec-low",
>   					  "hpd-connected", "hpd-removed";
>   			ddc = <&ddc1>;
> +			status = "disabled";
>   		};
>   	};
>   
> @@ -439,6 +448,7 @@ axi: axi {
>   
>   		vc4: gpu {
>   			compatible = "brcm,bcm2712-vc6";
> +			status = "disabled";
>   		};
>   
>   		pcie0: pcie at 1000100000 {
> @@ -611,5 +621,6 @@ hvs: hvs at 107c580000 {
>   		interrupt-parent = <&disp_intr>;
>   		interrupts = <2>, <9>, <16>;
>   		interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
> +		status = "disabled";
>   	};
>   };