[PATCH v2 0/4] Add workaround for HIP10/HIP10C erratum 162200802

[Marc Zyngier]

On Mon, 01 Sep 2025 11:55:49 +0100,
Zhou Wang <wangzhou1 at hisilicon.com> wrote:
> 
> On 2025/8/25 10:39, Zhou Wang wrote:
> > As the discussion from V1 series, V2 series firstly adds GICD.num_LPIs
> > writable support, then add HiSilicon erratum 162200802.
> > 
> > Erratum number should be 162200802, make a mistake in V1, so fix it as
> > well.
> > 
> > Zhou Wang (4):
> >   KVM: arm64: Allow userspace to write GICD_TYPER.num_LPIs
> >   KVM: arm64: selftests: Add test for GICD.num_LPIs
> >   Documentation: KVM: arm64: Add GICD_TYPER.num_LPIs writable
> >     description
> >   ARM64: errata: Add workaround for HIP10/HIP10C erratum 162200802
> 
> Hi Marc and Oliver,
> 
> As the discussion in V1 series, this series firstly adds GICD.num_LPIs
> writable support, then add erratum patch.

Given the state of this HW (as per [1]), I'd rather we start by
working out the strategy at the GIC level, rather than exposing stuff
to userspace before we agree on a way to make it work in the kernel.

Thanks,

	M.

[1] https://lore.kernel.org/r/20250909110615.129179-1-wangzhou1@hisilicon.com

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