[PATCH v2 0/4] Add workaround for HIP10/HIP10C erratum 162200802

[Zhou Wang]

On 2025/8/25 10:39, Zhou Wang wrote:
> As the discussion from V1 series, V2 series firstly adds GICD.num_LPIs
> writable support, then add HiSilicon erratum 162200802.
> 
> Erratum number should be 162200802, make a mistake in V1, so fix it as
> well.
> 
> Zhou Wang (4):
>   KVM: arm64: Allow userspace to write GICD_TYPER.num_LPIs
>   KVM: arm64: selftests: Add test for GICD.num_LPIs
>   Documentation: KVM: arm64: Add GICD_TYPER.num_LPIs writable
>     description
>   ARM64: errata: Add workaround for HIP10/HIP10C erratum 162200802

Hi Marc and Oliver,

As the discussion in V1 series, this series firstly adds GICD.num_LPIs
writable support, then add erratum patch.

If this series is OK, I will prepare QEMU related patch.

BTW v1 is https://lore.kernel.org/all/20250626124142.2035110-1-wangzhou1@hisilicon.com/

Best,
Zhou

> 
>  Documentation/arch/arm64/silicon-errata.rst   |  2 ++
>  .../virt/kvm/devices/arm-vgic-v3.rst          |  6 ++++
>  arch/arm64/Kconfig                            | 12 +++++++
>  arch/arm64/include/asm/cputype.h              |  4 +++
>  arch/arm64/kernel/cpu_errata.c                | 15 +++++++++
>  arch/arm64/kvm/vgic/vgic-init.c               |  9 +++++
>  arch/arm64/kvm/vgic/vgic-its.c                |  9 +++--
>  arch/arm64/kvm/vgic/vgic-kvm-device.c         |  1 +
>  arch/arm64/kvm/vgic/vgic-mmio-v3.c            | 22 +++++++++++++
>  arch/arm64/tools/cpucaps                      |  1 +
>  include/kvm/arm_vgic.h                        |  1 +
>  include/linux/irqchip/arm-gic-v3.h            |  1 +
>  tools/testing/selftests/kvm/arm64/vgic_init.c | 33 +++++++++++++++++++
>  .../selftests/kvm/include/arm64/gic_v3.h      |  2 ++
>  14 files changed, 116 insertions(+), 2 deletions(-)
>