[PATCH v1 3/8] PCI: brcmstb: Use bridge reset if available

[Jim Quinlan]

On Tue, Jul 2, 2024 at 8:59 AM Stanimir Varbanov <svarbanov at suse.de> wrote:
>
>
>
> On 6/28/24 23:54, Jim Quinlan wrote:
> > The 7712 SOC has a bridge reset which can be described in the device tree.
> > If it is present, use it. Otherwise, continue to use the legacy method to
> > reset the bridge.
> >
> > Signed-off-by: Jim Quinlan <james.quinlan at broadcom.com>
> > ---
> >  drivers/pci/controller/pcie-brcmstb.c | 24 +++++++++++++++++++-----
> >  1 file changed, 19 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> > index c2eb29b886f7..4104c3668fdb 100644
> > --- a/drivers/pci/controller/pcie-brcmstb.c
> > +++ b/drivers/pci/controller/pcie-brcmstb.c
> > @@ -265,6 +265,7 @@ struct brcm_pcie {
> >       enum pcie_type          type;
> >       struct reset_control    *rescal;
> >       struct reset_control    *perst_reset;
> > +     struct reset_control    *bridge;
> >       int                     num_memc;
> >       u64                     memc_size[PCIE_BRCM_MAX_MEMC];
> >       u32                     hw_rev;
> > @@ -732,12 +733,19 @@ static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus,
> >
> >  static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)
> >  {
> > -     u32 tmp, mask =  RGR1_SW_INIT_1_INIT_GENERIC_MASK;
> > -     u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT;
> > +     if (pcie->bridge) {
> > +             if (val)
> > +                     reset_control_assert(pcie->bridge);
> > +             else
> > +                     reset_control_deassert(pcie->bridge);
>
> Please check reset_control_assert/deassert() calls for error. This might
> need to change the definition of brcm_pcie_bridge_sw_init_set_generic()
> to return error.

Hi Stan,

Do you really think this is necessary?  If you look at
"drivers/reset/reset-brcmstb.c"  there is no way for either of these
calls to fail and I don't see that changing because it is just writing
a bit into a register.

Regards,
Jim Quinlan
Broadcom STB/CM
>
> ~Stan
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