[PATCH v2 3/7] dt-bindings: reset: Add binding constants for BLZP1600

[Krzysztof Kozlowski]

On 24/04/2024 15:32, Niko Pasaloukos wrote:
> Add SCMI reset numbers according to the Blaize BLZP1600 SoC
> hardware specifications.
> 
> Reviewed-by: James Cowgill <james.cowgill at blaize.com>
> Reviewed-by: Matt Redfearn <matt.redfearn at blaize.com>
> Reviewed-by: Neil Jones <neil.jones at blaize.com>
> Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos at blaize.com>
> ---
>  .../dt-bindings/reset/blaize,blzp1600-reset.h | 84 +++++++++++++++++++
>  1 file changed, 84 insertions(+)
>  create mode 100644 include/dt-bindings/reset/blaize,blzp1600-reset.h

This goes with patch adding the binding doc.

> 
> diff --git a/include/dt-bindings/reset/blaize,blzp1600-reset.h b/include/dt-bindings/reset/blaize,blzp1600-reset.h
> new file mode 100644
> index 000000000000..c500c2b0690c
> --- /dev/null
> +++ b/include/dt-bindings/reset/blaize,blzp1600-reset.h
> @@ -0,0 +1,84 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * Copyright (C) 2023, Blaize, Inc.
> + */
> +
> +#ifndef DT_BINDING_RESET_BLZP1600_H
> +#define DT_BINDING_RESET_BLZP1600_H
> +
> +/* ARM SCMI resets */
> +
> +/* BLZP1600 reset numbers as defined in the hardware architecture */
> +
> +#define BLZP1600_A53_C0_HARD_RST 0
> +#define BLZP1600_A53_C0_SOFT_RST 1
> +#define BLZP1600_A53_C1_HARD_RST 2
> +#define BLZP1600_A53_C1_SOFT_RST 3
> +#define BLZP1600_A53_L2_CACHE_RST 4
> +#define BLZP1600_A53_DBG_RST 5
> +#define BLZP1600_GIC_RST 6
> +#define BLZP1600_CRYPTO_RST 7
> +/* reset 8 invalid */

Same concerns.

However another problem is lack of users of it. Your patchset looks
random - this goes to subsustem, but there is no device binding, no
driver, no DTS. Could be result of lack of threading. :/

Best regards,
Krzysztof