[PATCH v1 3/3] perf arm-spe: Support data source for Cortex-X4 CPU

[Will Deacon]

On Mon, Jul 24, 2023 at 07:05:09PM +0800, Leo Yan wrote:
> On Mon, Jul 24, 2023 at 12:27:31PM +0530, Anshuman Khandual wrote:
> 
> [...]
> 
> > > -static const struct midr_range neoverse_spe[] = {
> > > +static const struct midr_range cpus_use_default_data_src[] = {
> > 
> > Is not 'cpus_use_default_data_src' too long ? 'use' could be dropped ?
> 
> Okay, I can drop 'use'.
> 
> > >  	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
> > >  	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
> > >  	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
> > > +	MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
> > >  	{},
> > >  };
> 
> [...]
> 
> > >  static u64 arm_spe__synth_data_source(const struct arm_spe_record *record, u64 midr)
> > >  {
> > >  	union perf_mem_data_src	data_src = { .mem_op = PERF_MEM_OP_NA };
> > > -	bool is_neoverse = is_midr_in_range_list(midr, neoverse_spe);
> > > +	bool is_default_dc =
> > 
> > _dc stands for ?
> 
> Thanks for pointing out this; actually I mean '_ds' which stands for
> data source.  Will spin a new patch for this.

Thanks. Please can you put patch 2 (the one touching tools) at the end of
the series, too? That way I can easily pick up the kernel changes.

Will