[PATCH v1 3/3] perf arm-spe: Support data source for Cortex-X4 CPU
Leo Yan
leo.yan at linaro.org
Mon Jul 24 04:05:09 PDT 2023
Hi Anshuman,
On Mon, Jul 24, 2023 at 12:27:31PM +0530, Anshuman Khandual wrote:
[...]
> > -static const struct midr_range neoverse_spe[] = {
> > +static const struct midr_range cpus_use_default_data_src[] = {
>
> Is not 'cpus_use_default_data_src' too long ? 'use' could be dropped ?
Okay, I can drop 'use'.
> > MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
> > MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
> > MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
> > + MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
> > {},
> > };
[...]
> > static u64 arm_spe__synth_data_source(const struct arm_spe_record *record, u64 midr)
> > {
> > union perf_mem_data_src data_src = { .mem_op = PERF_MEM_OP_NA };
> > - bool is_neoverse = is_midr_in_range_list(midr, neoverse_spe);
> > + bool is_default_dc =
>
> _dc stands for ?
Thanks for pointing out this; actually I mean '_ds' which stands for
data source. Will spin a new patch for this.
Thanks for review!
Leo
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