[PATCH v4 4/6] arm64: dts: qcom: ipq5332: Add USB related nodes

[Dmitry Baryshkov]

On 12/07/2023 15:04, Krzysztof Kozlowski wrote:
> On 12/07/2023 13:38, Varadarajan Narayanan wrote:
>> Add USB phy and controller nodes.
>>
>> Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
>> ---
>> v4:
>> 	Change node name
>> 	Remove blank line
>> 	'make CHECK_DTBS=y DT_SCHEMA_FILES=qcom qcom/ipq5332-rdp441.dtb' passed
>> v1:
>> 	Rename phy node
>> 	Change compatible from m31,ipq5332-usb-hsphy -> qcom,ipq5332-usb-hsphy
>> 	Remove 'qscratch' from phy node
>> 	Fix alignment and upper-case hex no.s
>> 	Add clock definition for the phy
>> 	Remove snps,ref-clock-period-ns as it is not used. dwc3_ref_clk_period()
>> 	in dwc3/core.c takes the frequency from ref clock and calculates fladj
>> 	as appropriate.
>> ---
>>   arch/arm64/boot/dts/qcom/ipq5332.dtsi | 53 +++++++++++++++++++++++++++++++++++
>>   1 file changed, 53 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> index 8bfc2db..8118356 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> @@ -405,6 +405,59 @@
>>   				status = "disabled";
>>   			};
>>   		};
>> +
>> +		usbphy0: usb-phy at 7b000 {
>> +			compatible = "qcom,ipq5332-usb-hsphy";
>> +			reg = <0x0007b000 0x12c>;
>> +
>> +			clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
>> +			clock-names = "cfg_ahb";
>> +
>> +			resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
>> +
>> +			status = "disabled";
>> +		};
>> +
>> +		usb2: usb2 at 8a00000 {
> 
> So you responded to my comments, wait ten minutes and send v2? No need
> to wait for my feedback, right?
> 
> No, it's not ok. This is "usb", not "usb2". Are you saying you have
> second device with the same address?

Just to emphasise, it's the node name `usb2', which is not fine. DT 
label `usb2' is (hopefully) fine.

-- 
With best wishes
Dmitry