[PATCH 1/3] perf/imx_ddr: speed up overflow frequency of cycle counter

[Frank Li]

> +
> +		/*
> +		 * Workaround for i.MX8MP:
> +		 * Common counters and byte counters share the same
> COUNTER_CNTL,
> +		 * and byte counters could overflow before cycle counter.
> Need set
> +		 * counter parameter(CP) of cycle counter to give it initial
> value
> +		 * which can speed up cycle counter overflow frequency.
> +		 */
> +		if ((pmu->devtype_data->quirks &
> DDR_CAP_AXI_ID_FILTER_ENHANCED) ==
> +		    DDR_CAP_AXI_ID_FILTER_ENHANCED) {

needn't `==`
if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED)

Did you fixed cycle counter also? Dose cycle counter read get correct value?  

Frank

> +			if (counter == EVENT_CYCLES_COUNTER)
> +				val |= FIELD_PREP(CNTL_CP_MASK, 0xf0);
> +		}
> +
>  		writel(val, pmu->base + reg);
>  	} else {
>  		/* Disable counter */
> --
> 2.34.1