[PATCH] arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()

[Will Deacon]

On Wed, Sep 07, 2022 at 11:03:05AM +0200, Christoph Hellwig wrote:
> On Tue, Aug 23, 2022 at 01:21:11PM +0100, Will Deacon wrote:
> > arch_dma_prep_coherent() is called when preparing a non-cacheable region
> > for a consistent DMA buffer allocation. Since the buffer pages may
> > previously have been written via a cacheable mapping and consequently
> > allocated as dirty cachelines, the purpose of this function is to remove
> > these dirty lines from the cache, writing them back so that the
> > non-coherent device is able to see them.
> 
> Yes.
> 
> > I'm slightly wary about this change as other architectures seem to do
> > clean+invalidate here, but I'd like to hear what others think in any
> > case.
> 
> If arm64 is fine with having clean but present cachelines when creating
> an uncached mapping for a cache line, the invalidate is not required.
> 
> But isn't it better for the cache if these by definition useless
> cachelines get evicted?
> 
> My biggest concern here is that we're now moving from consolidating
> these semantics in all the different architectures to different ones,
> making a centralization of the policies even harder.

I definitely wouldn't object to a pointless invalidation if it helped with
consolidation, and we could add a comment to the arch code to that effect.
At the moment, however, I can't imagine what this consolidation would look
like -- at the end of the day we're going to need to dip into the arch
for the cache op.

Do you have a branch, or is it a longer-term goal?

Will