[PATCH v2 2/2] arm64: smccc: Support SMCCC v1.3 SVE register saving hint

[Mark Brown]

On Wed, May 19, 2021 at 09:05:41AM +0200, Ard Biesheuvel wrote:
> On Tue, 18 May 2021 at 20:35, Mark Brown <broonie at kernel.org> wrote:

> > + * Since we need scratch registers but wish to avoid having to handle
> > + * the stack we expect the caller to preserve x15 and x16 if needed,

> You should use x16 and x17 here. The calling convention dictates that
> the linker may use x16 and x17 in a veneer (or PLT lookup sequence) if
> the branch to  __smccc_sve_check() goes out of range, and even if our
> PLT code only uses x16 at this time, it is better to follow the AAPCS
> here.

Oh, of course - not sure why I didn't use x17 TBH.

> > + * the only callers are expected to be the call below and the inline
> > + * asm in linux/arm-smccc.h for SMCCC 1.1 and later calls.
> > + */
> > +SYM_CODE_START(__smccc_sve_check)
> > +       BTI_C

> Any reason not to use SYM_FUNC_START() here?

Not with the changes you've suggested, 

> > +alternative_if ARM64_SVE
> > +
> > +       ldr_l   x15, smccc_has_sve_hint
> > +       cbz     x15, 2f
> > +
> > +       get_current_task x15
> > +       ldr     x15, [x15, #TSK_TI_FLAGS]
> > +       and     x16, x15, #_TIF_FOREIGN_FPSTATE // Any live FP state?
> > +       cbnz    x16, 1f

> You could use tbnz here, with the actual shift in TIF_FOREIGN_FPSTATE

Ah, yes - I'd misremembered what tbnz uses and thought it didn't apply.
That does help a lot.

> >         .macro SMCCC instr
> > +alternative_if ARM64_SVE
> > +       bl      __smccc_sve_check
> > +alternative_else_nop_endif

> Do we need the redundant alternatives here? Could we use an
> ALTERNATIVE() below instead, and drop the one in __smccc_sve_check?

We do need the one right there, but with the use of ALTERNATIVE() in the
inline asm we'd be able to drop the one in __smccc_sve_check.  Or for
that matter we could not bother with alternatives at all if we're happy
that the overhead were OK.
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