About cachetype on ARMv7

[Russell King - ARM Linux]

On Wed, Jul 07, 2010 at 09:20:57AM +0900, Kukjin Kim wrote:
> > The requirements for N is such the CPU visible conditions which qualify a
> > cache as being VIPT non-aliasing also satisfy PIPT - and a non-aliasing
> > VIPT cache has the same properties as a PIPT cache.
> 
> Thanks for your reply :-)
> 
> You mean PIPT is the same as VIPT non-aliasing.

No, because that's not the case - they are different at the hardware
level.  At the software level, they can be treated the same though.

> Hmm..there is no need to show exactly cachetype in the kernel boot message?

The boot message shows how the kernel drives the cache, not what the
actual cache is - which is far more informative about what the kernel
is doing.

We can find out what the hardware is by looking in specification docs;
we don't need the kernel to tell us that.