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From: Sascha Hauer &lt;<a href=3D"mailto:s.hauer at pengutronix.de">s.hauer at pe=
ngutronix.de</a>&gt;<br>
Date: Mon, 30 Nov 2009 13:31:29 +0100<br>
Subject: [PATCH] i.MX27 audmux: Fix register offsets<br>
<br>
The PPCR registers start at 0x10, not 0xc. Fix this.<br>
<br>
Signed-off-by: Sascha Hauer &lt;<a href=3D"mailto:s.hauer at pengutronix.de">s=
.hauer at pengutronix.de</a>&gt;<br>
---<br>
=A0arch/arm/plat-mxc/include/mach/audmux.h | =A0 =A06 +++---<br>
=A01 files changed, 3 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/in=
clude/mach/audmux.h<br>
index 5cd6466..dcc12d4 100644<br>
--- a/arch/arm/plat-mxc/include/mach/audmux.h<br>
+++ b/arch/arm/plat-mxc/include/mach/audmux.h<br>
@@ -4,9 +4,9 @@<br>
<div class=3D"im">=A0#define MX27_AUDMUX_HPCR1_SSI0 =A0 =A0 =A0 =A0 0<br>
=A0#define MX27_AUDMUX_HPCR2_SSI1 =A0 =A0 =A0 =A0 1<br>
=A0#define MX27_AUDMUX_HPCR3_SSI_PINS_4 =A0 2<br>
-#define MX27_AUDMUX_PPCR1_SSI_PINS_1 =A0 3<br>
-#define MX27_AUDMUX_PPCR2_SSI_PINS_2 =A0 4<br>
-#define MX27_AUDMUX_PPCR3_SSI_PINS_3 =A0 5<br>
</div>+#define MX27_AUDMUX_PPCR1_SSI_PINS_1 =A0 4<br>
+#define MX27_AUDMUX_PPCR2_SSI_PINS_2 =A0 5<br>
+#define MX27_AUDMUX_PPCR3_SSI_PINS_3 =A0 6<br></blockquote><br>Be careful,=
<br>I think this patch breaks some of the boards currently using MXC_AUDMUX=
_V1_PCR_RXDSEL(x) and similar macros defined in mach/audmux.h (for example =
pcm038).<br>
For those macros the old AUDMUX register indexes are fine.<br><br>I suggest=
 fixing this inside audmux_v1.c instead of modifying mach/audmux.h.<br><br>=
<br>Thank you.<br></div>-- <br>Javier Martin<br>Vista Silicon S.L.<br>CDTUC=
 - FASE C - Oficina S-345<br>
Avda de los Castros s/n<br>39005- Santander. Cantabria. Spain<br>+34 942 25=
 32 60<br><a href=3D"http://www.vista-silicon.com">www.vista-silicon.com</a=
><br>

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