[PATCH v1 7/7] mci: imx-esdhc: support DMA in the i.MX8M PBL eMMC loader

[SCHNEIDER Johannes]

Hoi Sascha,


> >
> > > On 2026-06-27 19:43, Johannes Schneider wrote:
> > > > The PBL eMMC loader was hardwired to PIO via esdhc_use_pio_mode(): IN_PBL
> > > > forced PIO unconditionally. PIO is slow -- on an i.MX8MM board loading the
> > > > ~1.6 MB next stage took ~559 ms; SDMA/ADMA2 do it in ~21 ms.
> > >
> > > For proper DMA support you'll need memory synchronization in form of dma_map_*
> > > or dma_sync_* helpers which we do not have in PBL. Without them it won't
> > > work with MMU enabled.
> >
> > Noted. So since the MMU is still left as it is = off were still good wtih the
> > current sdma/adma implementation. But maybe worth a comment in the code/commit?
> >
> > > Have you tried enabling the MMU in the mean time? This
> > > should give you decent performance even with PIO.
> > >
> > > Sascha
> > >
> >
> > Thanks for the hint/idea!
> > I've let the AI draft a PIO+MMU-on change and ran a round of measurements,
> > (Caveat: sample size is one) there is some gain - but we get more with SDMA or ADMA
> > And interestingly "the same" with the later two.:
> >
> >  Phase                  PIO   PIO+MMU   SDMA   ADMA2
> > --------------------------------------------------------------------
> >  BootROM                  1       1       1        2
> >  PBL-init                 3       3       3        3
> >  DDR-training           265     265     262      269
> >  PBL-load (total)       884     413     257      258
> >    PBL-pre-load         165     170     166      167
> >    load_bl33            713     241      86       85
> >    PBL-post-load          5       1       5        5
> >  BL31-early             114     114     114      114
> >  BL31-platform           16      15      15       15
> >  BL31-runtime            98      98      98       98
> > --------------------------------------------------------------------
> >  time-to-barebox       1393     921     763      770
> >
> >
> > If you want i can brush up that PIO+MMU code and send it out too.
> 
> Let's concentrate on the MMU stuff first as that's something you want to
> have anyway for faster sha256 support.
> 
> Sascha
> 

Ok, i've sent out a v2 with the "MMU first", and sorted it in a way that you can
"cut here" if you want to pick up only the first part before the SDMA/ADMA

The combined series his here:
https://lists.infradead.org/pipermail/barebox/2026-July/056903.html

gruß
Johannes