Is something using DMA channel 0?

[Gordon Hollingworth]

Not sure if this will make it to the listŠ ButŠ

DMA 0 is different to the rest of the DMA channels because it's in a
completely different place architecturally speakingŠ  Specifically it sits
within the VPU block (the processor in the 'GPU') rather than outside with
the rest.  It therefore has access to the VPU L1 cache rather than just
the L2, so basically you can't use it for any 'normal' addressesŠ

Do you know what the physical address looks like (the actual physical
address you are writing to the DMA controller), it should be 0x40000000
which means it should skip the VPU L1 cache but hit the L2 cacheŠ

I'd suggest not using DMA0 there is no point from the ARM, it's
specifically made for doing cache coherent memory to memory accessesŠ