[PATCH 4/5] arm64: dts: rockchip: Add DSI panel to RK3588 EVB1

Chaoyi Chen chaoyi.chen at rock-chips.com
Sat Nov 7 19:15:09 PST 2026


Hi Sebastian,

On 11/7/2026 5:57 AM, Sebastian Reichel wrote:
> The RK3588 EVB1 comes with a W552793DBA-V10 Touchscreen/Display
> combination. It contains a Wanchanglong W552793BAA panel and a
> Goodix GT1158 touchscreen. This adds the DT description of it.
> 
> Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 90 ++++++++++++++++++++++++
>  1 file changed, 90 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
> index 6a95a8bb6fb8..327ca13b60f0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
> @@ -204,6 +204,15 @@ vcc12v_dcin: regulator-vcc12v-dcin {
>  		regulator-max-microvolt = <12000000>;
>  	};
>  

I seem unable to apply the patch to the latest linux-next tree.

So I tried to resolve the conflict manually, but the actual
test screen did not display. I will look into this further.


> +	vcc3v3_lcd_mipi: regulator-vcc3v3-lcd-mipi {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc3v3_lcd_mipi";
> +		regulator-boot-on;
> +		enable-active-high;
> +		gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
> +		vin-supply = <&vcc_3v3_s0>;
> +	};
> +
>  	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vcc3v3_pcie30";
> @@ -338,6 +347,43 @@ &cpu_l3 {
>  	cpu-supply = <&vdd_cpu_lit_s0>;
>  };
>  
> +&dsi0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	panel at 0 {
> +		compatible = "wanchanglong,w552793baa", "raydium,rm67200";
> +		reg = <0>;
> +		backlight = <&backlight>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&lcd_rst_gpio>;
> +		vdd-supply = <&vcc3v3_lcd_mipi>;
> +		iovcc-supply = <&vcc3v3_lcd_mipi>;
> +		vsp-supply = <&vcc5v0_sys>;
> +		vsn-supply = <&vcc5v0_sys>;
> +		reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
> +
> +		port {
> +			mipi_panel_in: endpoint {
> +				remote-endpoint = <&dsi0_out_panel>;
> +			};
> +		};
> +	};
> +};
> +
> +&dsi0_in {
> +	dsi0_in_vp3: endpoint {
> +		remote-endpoint = <&vp3_out_dsi0>;
> +	};
> +};
> +
> +&dsi0_out {
> +	dsi0_out_panel: endpoint {
> +		remote-endpoint = <&mipi_panel_in>;
> +	};
> +};
> +
>  &gmac0 {
>  	clock_in_out = "output";
>  	phy-handle = <&rgmii_phy>;
> @@ -495,6 +541,22 @@ hym8563: rtc at 51 {
>  	};
>  };
>  
> +&i2c6 {
> +	status = "okay";
> +
> +	gt1x: touchscreen at 14 {
> +		compatible = "goodix,gt1158";
> +		reg = <0x14>;
> +		interrupt-parent = <&gpio0>;
> +		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&touchscreen_pins>;
> +		reset-gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>;
> +		AVDD28-supply = <&vcc3v3_lcd_mipi>;
> +		VDDIO-supply = <&vcc3v3_lcd_mipi>;
> +	};
> +};
> +
>  &i2c7 {
>  	status = "okay";
>  
> @@ -543,6 +605,10 @@ rgmii_phy: ethernet-phy at 1 {
>  	};
>  };
>  
> +&mipidcphy0 {
> +	status = "okay";
> +};
> +
>  &pcie2x1l0 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pcie2_0_rst>, <&pcie2_0_wake>, <&pcie2_0_clkreq>, <&wifi_host_wake_irq>;
> @@ -664,6 +730,12 @@ hym8563_int: hym8563-int {
>  		};
>  	};
>  
> +	mipi_dsi {
> +		lcd_rst_gpio: lcd-rst {
> +			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
> +		};
> +	};
> +
>  	pcie2 {
>  		pcie2_0_rst: pcie2-0-rst {
>  			rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
> @@ -692,6 +764,14 @@ vcc3v3_pcie30_en: vcc3v3-pcie30-en {
>  		};
>  	};
>  
> +	touchscreen {
> +		touchscreen_pins: touchscreen-pins {
> +			rockchip,pins =
> +				<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>,
> +				<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
> +		};
> +	};
> +
>  	usb {
>  		vcc5v0_host_en: vcc5v0-host-en {
>  			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> @@ -1534,3 +1614,13 @@ vp1_out_hdmi1: endpoint at ROCKCHIP_VOP2_EP_HDMI1 {
>  		remote-endpoint = <&hdmi1_in_vp1>;
>  	};
>  };
> +
> +&vp3 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	vp3_out_dsi0: endpoint at ROCKCHIP_VOP2_EP_MIPI0 {
> +		reg = <ROCKCHIP_VOP2_EP_MIPI0>;
> +		remote-endpoint = <&dsi0_in_vp3>;
> +	};
> +};
> 

-- 
Best, 
Chaoyi




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