[PATCH V12 3/9] iio: imu: inv_icm42607: Add inv_icm42607 Core Driver
Chris Morgan
macromorgan at hotmail.com
Sun Jun 14 19:12:56 PDT 2026
On Sun, Jun 14, 2026 at 05:18:47PM +0100, Jonathan Cameron wrote:
> On Thu, 11 Jun 2026 15:26:00 -0500
> Chris Morgan <macroalpha82 at gmail.com> wrote:
>
> > From: Chris Morgan <macromorgan at hotmail.com>
> >
> > Add the core component of a new inv_icm42607 driver. This includes
> > a few setup functions and the full register definition in the
> > header file, as well as the bits necessary to compile and probe the
> > device when used on an i2c bus.
> >
> > Signed-off-by: Chris Morgan <macromorgan at hotmail.com>
> Hi Chris,
>
> Given this is nearly ready to merge I took a look at Sashiko and
> seems it has found a few more things.
>
> Other than those, looks good to me.
>
> Jonathan
Thanks. I'm going to resubmit again probably tomorrow (even though
it's merge window, again unless you don't want it).
I've removed the buffer from the main st struct, since it's really
no longer needed given the lack of buffer support. Additionally
I've removed the registers completely that sashiko was complaining
about, since it only applies to the 42607c and isn't used by this
driver right now anyway (only needed for APEX/WoM). I also altered
the power management logic a bit to prevent it from delaying on
shutdown, except for when the gyro changes state which the datasheet
says is needed. If Sashiko continues to complain about power management
for the temp sensor that can be ignored, as I've confirmed so long as
both the gyro and accel are off the whole chip is "off". Along with
making a change from 42607x to just 42607 in a few places those are
the only major changes.
Chris
>
> > diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607.h b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
> > new file mode 100644
> > index 000000000000..c85d3b74166f
> > --- /dev/null
> > +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607.h
>
> > +#define INV_ICM42607_REG_INTF_CONFIG0 0x35
> > +#define INV_ICM42607_INTF_CONFIG0_FIFO_COUNT_FORMAT BIT(6)
> > +#define INV_ICM42607_INTF_CONFIG0_FIFO_COUNT_ENDIAN BIT(5)
> > +#define INV_ICM42607_INTF_CONFIG0_SENSOR_DATA_ENDIAN BIT(4)
> > +#define INV_ICM42607_INTF_CONFIG0_UI_SIFS_CFG_MASK GENMASK(1, 0)
> > +#define INV_ICM42607_INTF_CONFIG0_UI_SIFS_CFG_SPI_DIS \
> > + FIELD_PREP(INV_ICM42607_INTF_CONFIG0_UI_SIFS_CFG_MASK, 2)
> Define this as simply 2.
>
> > +#define INV_ICM42607_INTF_CONFIG0_UI_SIFS_CFG_I2C_DIS \
> > + FIELD_PREP(INV_ICM42607_INTF_CONFIG0_UI_SIFS_CFG_MASK, 3)
> and 3
> not the FIELD_PREPified version
>
> Sashiko correctly called out that it is field_prepped again at
> the callsite. As the mask includes lowest bit this is will 'work'
> but definitely isn't what you intended!
>
>
> > diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
> > new file mode 100644
> > index 000000000000..5d40f1ee53d6
> > --- /dev/null
> > +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_core.c
>
> > +static bool inv_icm42607_is_readable_reg(struct device *dev, unsigned int reg)
> > +{
> > + switch (reg) {
> > + case INV_ICM42607_REG_MCLK_RDY ... INV_ICM42607_REG_INT_CONFIG:
> > + case INV_ICM42607_REG_TEMP_DATA1 ... INV_ICM42607_REG_TMST_FSYNCL:
> > + case INV_ICM42607_REG_APEX_DATA4 ... INV_ICM42607_REG_INTF_CONFIG1:
> > + case INV_ICM42607_REG_INT_STATUS_DRDY ... INV_ICM42607_REG_FIFO_DATA:
> Sashiko pointed out that the WOM_ registers, 4b to 4d are in the defines, but
> not readable or writeable which seems like an omission.
>
> So far only matters for debug, but perhaps better to add them from the start.
>
> > + case INV_ICM42607_REG_WHOAMI:
> > + return true;
> > + }
> > +
> > + return false;
> > +}
> > +
> > +static bool inv_icm42607_is_writeable_reg(struct device *dev, unsigned int reg)
> > +{
> > + switch (reg) {
> > + case INV_ICM42607_REG_DEVICE_CONFIG ... INV_ICM42607_REG_INT_CONFIG:
> > + case INV_ICM42607_REG_PWR_MGMT0 ... INV_ICM42607_REG_INT_SOURCE4:
> > + case INV_ICM42607_REG_INTF_CONFIG0 ... INV_ICM42607_REG_INTF_CONFIG1:
> > + return true;
> > + }
> > +
> > + return false;
> > +}
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