[PATCH] mmc: sdhci-of-dwcmshc: Change DLL_STRBIN_TAPNUM_DEFAULT to 0x4

[Hugh Cole-Baker]

Hi Shawn,

On 20/10/2025 02:49, Shawn Lin wrote:
> strbin signal delay under 0x8 configuration is not stable after massive
> test. The recommandation of it should be 0x4.
> 
> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>
> ---
> 
>  drivers/mmc/host/sdhci-of-dwcmshc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index eebd453..5b61401 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -94,7 +94,7 @@
>  #define DLL_TXCLK_TAPNUM_DEFAULT	0x10
>  #define DLL_TXCLK_TAPNUM_90_DEGREES	0xA
>  #define DLL_TXCLK_TAPNUM_FROM_SW	BIT(24)
> -#define DLL_STRBIN_TAPNUM_DEFAULT	0x8
> +#define DLL_STRBIN_TAPNUM_DEFAULT	0x4
>  #define DLL_STRBIN_TAPNUM_FROM_SW	BIT(24)
>  #define DLL_STRBIN_DELAY_NUM_SEL	BIT(26)
>  #define DLL_STRBIN_DELAY_NUM_OFFSET	16

This patch gets the Foresee A3A444 eMMC on my NanoPC-T6 board to work reliably
in HS400 Enhanced Strobe mode; before this patch it would suffer from I/O
errors in HS400 mode as discussed in the other thread [1].

Tested-by: Hugh Cole-Baker <sigmaris at gmail.com>

Thanks,
Hugh

[1]: https://lore.kernel.org/linux-rockchip/52537005-b8a3-c202-770c-599efc6a4d17@manjaro.org/T/