[PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

ayaka ayaka at soulik.info
Sun Aug 21 05:19:40 PDT 2016



On 08/21/2016 07:06 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 8/21/2016 10:56 AM, Randy Li wrote:
>
>> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
>> has a hardware errata that causes everything to get confused when we get
>> a remote wakeup.  We'll use the reset that's in the CRU to reset the
>> port when it's in a bad state.
>>
>> Note that we add the reset to both dwc2 controllers even though only one
>> has the errata in case we find some other use for this reset that's
>> unrelated to the current hardware errata.  Only the host port gets the
>> quirk property, though.
>>
>> This patch came from Doug Anderson <dianders at chromium.org> originally.
>
>    Was it signed off by him? Don't you need to keep his authorship via 
> th "From:" tag?
I would rather the idea comes from him, but the implementation is 
different. I don't which tag would be
better? If the "From:" would be the best choice. I would resend the last 
two patches.
>> Signed-off-by: Randy Li <ayaka at soulik.info>
>> ---
>>  arch/arm/boot/dts/rk3288.dtsi | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rk3288.dtsi 
>> b/arch/arm/boot/dts/rk3288.dtsi
>> index 48ca4e4..646f49d 100644
>> --- a/arch/arm/boot/dts/rk3288.dtsi
>> +++ b/arch/arm/boot/dts/rk3288.dtsi
> [...]
>> @@ -871,6 +873,9 @@
>>                  clocks = <&cru SCLK_OTGPHY2>;
>>                  clock-names = "phyclk";
>>                  #clock-cells = <0>;
>> +                resets = <&cru SRST_USBHOST1_PHY>;
>> +                reset-names = "phy-reset";
>> +
>
>    Don't need empty line here.
I would be removed
>
>>              };
>>          };
>>      };
>
> MBR , Sergei




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