[PATCH v1 20/20] riscv: dts: starfive: jhb100: Add pinctrl nodes

[Changhuang Liang]

Hi, Conor

Thanks for the review.

> On Fri, Apr 24, 2026 at 04:13:30AM -0700, Changhuang Liang wrote:
> > Add pinctrl nodes for starfive JHB100 SoC. They contain
> > pinctrl_per0/pinctrl_per1/pinctrl_per2/pinctrl_per2pok/pinctrl_per3/
> > pinctrl_sys0/pinctrl_sys0h/pinctrl_sys1/pinctrl_sys2.
> >
> > Signed-off-by: Lianfeng Ouyang <lianfeng.ouyang at starfivetech.com>
> 
> What did Lianfeng do? A signoff alone suggests something is incorrectly
> attributed here.

We worked on this part together and will add the Co-developed-by tag.

> 
> > Signed-off-by: Changhuang Liang <changhuang.liang at starfivetech.com>
> > ---
> >  .../boot/dts/starfive/jhb100-evb1-eth.dts     |  27 +++++
> >  arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi |   4 +
> >  .../boot/dts/starfive/jhb100-pinctrl.dtsi     |  19 ++++
> >  arch/riscv/boot/dts/starfive/jhb100.dtsi      | 107
> ++++++++++++++++++
> >  4 files changed, 157 insertions(+)
> >  create mode 100644 arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi
> >
> > diff --git a/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts
> > b/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts
> > index 62cd046e1224..f7e82f9d0ff1 100644
> > --- a/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts
> > +++ b/arch/riscv/boot/dts/starfive/jhb100-evb1-eth.dts
> > @@ -4,3 +4,30 @@
> >   */
> >
> >  #include "jhb100-evb1.dtsi"
> > +
> > +&pinctrl_per0 {
> > +	gpioe-i3c0-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB8-11,
> 32-33 */
> > +	gpioe-i3c1-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB12-15,
> 34-35 */
> > +	gpioe-i3c2-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB16-23 */
> > +	gpioe-i3c4-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOB36-43 */
> > +};
> > +
> > +&pinctrl_per1 {
> > +	gpioe-spi-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC0-4 */
> > +	gpioe-qspi0-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC5-11 */
> > +	gpioe-qspi1-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC12-19
> */
> > +	gpioe-qspi2-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOC20-27
> */
> > +};
> > +
> > +&pinctrl_per2 {
> > +	gpionw-vref = <JHB100_PINVREF_1_8V>; /* VREF for GPIOD19-30 */ };
> > +
> > +&pinctrl_per3 {
> > +	gpios-vref = <JHB100_PINVREF_1_8V>; /* VREF for GPIOE0-10 */ };
> > +
> > +&pinctrl_sys2 {
> > +	gpiow-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOA36-39 */
> > +	gpiow-inner-vref = <JHB100_PINVREF_3_3V>; /* VREF for GPIOA40-43
> */
> > +};
> > diff --git a/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi
> > b/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi
> > index 462b6fb7953b..acd5949bcfdb 100644
> > --- a/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi
> > +++ b/arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi
> > @@ -3,7 +3,9 @@
> >   * Copyright (c) 2024-2026 StarFive Technology Co., Ltd.
> >   */
> >
> > +#include "jhb100-pinfunc.h"
> >  #include "jhb100.dtsi"
> > +#include "jhb100-pinctrl.dtsi"
> >
> >  / {
> >  	model = "StarFive JHB100 EVB-1";
> > @@ -29,4 +31,6 @@ memory at 40000000 {
> >
> >  &uart6 {
> >  	status = "okay";
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&uart6_pins>;
> >  };
> > diff --git a/arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi
> > b/arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi
> > new file mode 100644
> > index 000000000000..d12b79376521
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi
> > @@ -0,0 +1,19 @@
> > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > +/*
> > + * Copyright (c) 2025-2026 StarFive Technology Co., Ltd.
> > + */
> > +
> > +&pinctrl_sys2 {
> > +	uart6_pins: uart6-grp {
> > +		uart6-tx-pins {
> > +			pinmux = <PINMUX(PADNUM_SYS2_GPIO_A38,
> > +					 FUNC_SYS2_UART6_TX)>;
> > +		};
> > +
> > +		uart6-rx-pins {
> > +			pinmux = <PINMUX(PADNUM_SYS2_GPIO_A39,
> > +					 FUNC_SYS2_UART6_RX)>;
> > +			input-enable;
> > +		};
> > +	};
> > +};
> 
> Could we get some more examples, to exercise each pin controller?
> Is that impossible without adding more peripherals other than uart?
> 

Yes, providing more examples for each pin controller would require adding 
other peripherals beyond UART. Currently, we only have UART available. 
We can add more examples once other peripherals (like I2C, SPI, etc.) are 
enabled in the DT.

Best Regards,
Changhuang