[PATCH v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer at dabbelt.com>:

On Mon,  2 Jun 2025 12:15:43 +0000 you wrote:
> From: Cyril Bur <cyrilbur at tenstorrent.com>
> 
> During switch to csrs will OR the value of the register into the
> corresponding csr. In this case we're only interested in restoring the
> SUM bit not the entire register.
> 
> Fixes: 788aa64c0c01 ("riscv: save the SR_SUM status over switches")
> Signed-off-by: Cyril Bur <cyrilbur at tenstorrent.com>
> Link: https://lore.kernel.org/r/20250522160954.429333-1-cyrilbur@tenstorrent.com
> Co-developed-by: Alexandre Ghiti <alexghiti at rivosinc.com>
> Signed-off-by: Alexandre Ghiti <alexghiti at rivosinc.com>
> 
> [...]

Here is the summary with links:
  - [v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit
    https://git.kernel.org/riscv/c/4e27ce58e7fa

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html