[PATCH 08/10] riscv/arm64: dts: cv18xx: Add sysctl and reset nodes

[Krzysztof Kozlowski]

On 09/02/2025 23:06, Alexander Sverdlin wrote:
> Add reset controller node and required sysctl nodes.
> 
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin at gmail.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv18xx-periph.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx-periph.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx-periph.dtsi
> index 53834b0658b2..d793b6db4ed1 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx-periph.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx-periph.dtsi
> @@ -309,5 +309,21 @@ dmac: dma-controller at 4330000 {
>  			snps,data-width = <4>;
>  			status = "disabled";
>  		};
> +
> +		rtcsys_ctrl: syscon at 5025000 {
> +			compatible = "sophgo,cv1800-rtcsys-ctrl", "syscon";
> +			reg = <0x05025000 0x1000>;
> +		};
> +
> +		rtcsys_core: syscon at 5026000 {
> +			compatible = "sophgo,cv1800-rtcsys-core", "syscon";
> +			reg = <0x05026000 0x1000>;
> +		};
> +
> +		soc-reset {
> +			compatible = "sophgo,cv1800-reset";

Nope. You cannot have non-MMIO nodes in SoC which proves this is not a
real SoC device. Neither compatible, nor its placement is correct.

Depending on the hardware design, this most likely is just part of your
5025000 block.


Best regards,
Krzysztof