[PATCH] riscv, bpf: Optimize zextw insn with Zba extension
Wang, Xiao W
xiao.w.wang at intel.com
Thu May 9 02:31:31 PDT 2024
Hi Ben,
> -----Original Message-----
> From: ben.dooks at codethink.co.uk <ben.dooks at codethink.co.uk>
> Sent: Tuesday, May 7, 2024 10:00 PM
> To: Pu Lehui <pulehui at huawei.com>; Wang, Xiao W
> <xiao.w.wang at intel.com>; paul.walmsley at sifive.com; palmer at dabbelt.com;
> aou at eecs.berkeley.edu; luke.r.nels at gmail.com; xi.wang at gmail.com;
> bjorn at kernel.org
> Cc: ast at kernel.org; daniel at iogearbox.net; andrii at kernel.org;
> martin.lau at linux.dev; eddyz87 at gmail.com; song at kernel.org;
> yonghong.song at linux.dev; john.fastabend at gmail.com; kpsingh at kernel.org;
> sdf at google.com; haoluo at google.com; jolsa at kernel.org; linux-
> riscv at lists.infradead.org; linux-kernel at vger.kernel.org; bpf at vger.kernel.org;
> Li, Haicheng <haicheng.li at intel.com>
> Subject: Re: [PATCH] riscv, bpf: Optimize zextw insn with Zba extension
>
> On 07/05/2024 13:47, Pu Lehui wrote:
> >
> > On 2024/5/7 18:45, Xiao Wang wrote:
> >> The Zba extension provides add.uw insn which can be used to implement
> >> zext.w with rs2 set as ZERO.
> >>
> >> Signed-off-by: Xiao Wang <xiao.w.wang at intel.com>
> >> ---
> >> arch/riscv/Kconfig | 19 +++++++++++++++++++
> >> arch/riscv/net/bpf_jit.h | 18 ++++++++++++++++++
> >> 2 files changed, 37 insertions(+)
> >>
> >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> >> index 6bec1bce6586..0679127cc0ea 100644
> >> --- a/arch/riscv/Kconfig
> >> +++ b/arch/riscv/Kconfig
> >> @@ -586,6 +586,14 @@ config RISCV_ISA_V_PREEMPTIVE
> >> preemption. Enabling this config will result in higher memory
> >> consumption due to the allocation of per-task's kernel Vector
> >> context.
> >> +config TOOLCHAIN_HAS_ZBA
> >> + bool
> >> + default y
> >> + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba)
> >> + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba)
> >> + depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
> >> + depends on AS_HAS_OPTION_ARCH
> >> +
> >> config TOOLCHAIN_HAS_ZBB
>
> At this point would it be easier to ask the toolchain what's enabled
> and put into kconfig via some sort of script?
You mean to use some sort of script to automatically detect whether LD linker
can support a certain riscv extension?
I just went through the help guide of riscv64-linux-gnu-ld, and did some trial,
the "--architecture" argument usage is different from the CC's "-march". I can't find
other relevant args. It looks currently there's no direct method to dump the
supported riscv extensions of a LD.
Then I tried below test to see if we can check it via building from /dev/null, just like
the cc-option does.
Note: here CC is Zbb capable
CC -march=rv64gc_zbb -x c -c /dev/null -o tmp.o && LD tmp.o -o tmp.elf
I find that whether LD is Zbb capable or not, the above command just outputs
"warning: cannot find entry symbol _start ..", no error comes with older LD.
When we provide some Zbb-arch-tagged non-empty *.o file to the LD, then
the older LD would error out "unsupported ISA subset ..".
But I'm afraid it's not a good idea to add a source file for each extension detection.
Maybe in future there would be an easy way to ask the LD what riscv extensions
are supported.
BRs,
Xiao
>
> --
> Ben Dooks http://www.codethink.co.uk/
> Senior Engineer Codethink - Providing Genius
>
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