[PATCH] riscv, bpf: Optimize zextw insn with Zba extension

[Ben Dooks]

On 07/05/2024 13:47, Pu Lehui wrote:
> 
> On 2024/5/7 18:45, Xiao Wang wrote:
>> The Zba extension provides add.uw insn which can be used to implement
>> zext.w with rs2 set as ZERO.
>>
>> Signed-off-by: Xiao Wang <xiao.w.wang at intel.com>
>> ---
>>   arch/riscv/Kconfig       | 19 +++++++++++++++++++
>>   arch/riscv/net/bpf_jit.h | 18 ++++++++++++++++++
>>   2 files changed, 37 insertions(+)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index 6bec1bce6586..0679127cc0ea 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -586,6 +586,14 @@ config RISCV_ISA_V_PREEMPTIVE
>>         preemption. Enabling this config will result in higher memory
>>         consumption due to the allocation of per-task's kernel Vector 
>> context.
>> +config TOOLCHAIN_HAS_ZBA
>> +    bool
>> +    default y
>> +    depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba)
>> +    depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba)
>> +    depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
>> +    depends on AS_HAS_OPTION_ARCH
>> +
>>   config TOOLCHAIN_HAS_ZBB

At this point would it be easier to ask the toolchain what's enabled
and put into kconfig via some sort of script?

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

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