[PATCH v11 2/5] dt-bindings: clock: sophgo: add RP gate clocks for SG2042

Stephen Boyd sboyd at kernel.org
Fri Mar 8 18:15:12 PST 2024


Quoting Chen Wang (2024-02-19 19:08:59)
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    clock-controller at 10000000 {

This is the same address as the pll binding before this. How does that
work? It's the same register area as the pll node. The resulting DTB
should only have one compatible for this node.

> +      compatible = "sophgo,sg2042-rpgate";
> +      reg = <0x10000000 0x10000>;
> +      clocks = <&clkgen 85>;
> +      #clock-cells = <1>;
> +    };



More information about the linux-riscv mailing list