[PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support

Sunil V L sunilvl at ventanamicro.com
Mon Aug 26 10:13:07 PDT 2024


On Mon, Aug 26, 2024 at 06:15:18PM +0200, Rafael J. Wysocki wrote:
> On Mon, Aug 26, 2024 at 5:25 PM Thomas Gleixner <tglx at linutronix.de> wrote:
> >
> > On Mon, Aug 12 2024 at 06:37, Sunil V. L. wrote:
> > > On Mon, Aug 12, 2024 at 06:29:12AM +0530, Sunil V L wrote:
> > >> This series adds support for the below ECR approved by ASWG.
> > >> 1) MADT - https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view?usp=sharing
> > >>
> > >> The series primarily enables irqchip drivers for RISC-V ACPI based
> > >> platforms.
> > >
> > > This series has spent quite a bit of time now on the list. As you are
> > > aware, few clarifications like _PIC codes are also done now. There is
> > > no major change after you had agreed for the design. So, can this be
> > > considered for the next release please?
> >
> > Rafael, if you want to take it through the ACPI tree, then for the
> > irqchip parts please add:
> >
> >   Acked-by: Thomas Gleixner <tglx at linutronix.de>
> 
> Yes, I'm going ro do this.
> 
> Thank you!
Thanks!

There will be a conflict in PLIC irqchip driver due to a recent patch [1].
This patch is not in latest RC5 release but in linux-next. I usually base the
series on latest RC release. Should I rebase to linux-next in this case
and send the next revision of the series resolving the conflict?

[1] - https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=4d936f10ff80274841537a26d1fbfe9984de0ef9

Thanks,
Sunil



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