Fwd: Question about writing binding files for numa

[Chen Wang]

adding loop to linux-riscv maillist.



-------- 转发的消息 --------
主题: 	Question about writing binding files for numa
日期: 	Tue, 19 Sep 2023 13:33:16 +0800
From: 	Chen Wang <unicornxw at gmail.com>
收件人: 	robh+dt at kernel.org, krzysztof.kozlowski+dt at linaro.org, Conor 
Dooley <conor at kernel.org>, xiaoguang.xing <xiaoguang.xing at sophgo.com>, 
jszhang at kernel.org, Inochi Amaoto <inochiama at outlook.com>, 
devicetree at vger.kernel.org, linux-kernel at vger.kernel.org
抄送: 	Chen Wang <unicornxw at gmail.com>



Hi, I am working on writing dts for a new SOC - SG2042, you can see
the changes on 
https://github.com/unicornx/linux-riscv/commit/ee862fc4ebeade32bff00ad014d6b0513c0942a7.
This hardware uses a NUMA architecture, so a "distance-map" node is
added and several "numa-node-id" are added for cpu/memory. The problem
is I find there is no YAML binding for numa, I only find
"Documentation/devicetree/bindings/numa.txt". To pass dtb check I want
to convert the txt to yaml file.

My question is: how to handle the "numa-node-id" which is listed in
the numa.txt file. To my understanding, due to cpu/memory node need to
contain this property. I should find some binding files for cpu/memory
and add "numa-node-id" for cpu/memory.
For "cpu", I find a
"Documentation/devicetree/bindings/riscv/cpus.yaml", where I think I
can add a property of "numa-node-id" to. Note the SG2042 is a RISC-V
chip.
But for "memory", where should I add "numa-node-id" definition to?

Regards,

Chen Wang