[PATCH 1/4] dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible
Conor Dooley
conor at kernel.org
Thu Oct 26 06:10:37 PDT 2023
On Wed, Oct 25, 2023 at 11:56:37AM -0700, Emil Renner Berthing wrote:
> This cache controller is also used on the StarFive JH7100 SoC.
> Unfortunately it needs a quirk to work properly, so add dedicated
> compatible string to be able to match it.
>
> Signed-off-by: Emil Renner Berthing <emil.renner.berthing at canonical.com>
Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
Thanks,
Conor.
> ---
> Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> index 8a6a78e1a7ab..7e8cebe21584 100644
> --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> @@ -38,7 +38,9 @@ properties:
> - sifive,fu740-c000-ccache
> - const: cache
> - items:
> - - const: starfive,jh7110-ccache
> + - enum:
> + - starfive,jh7100-ccache
> + - starfive,jh7110-ccache
> - const: sifive,ccache0
> - const: cache
> - items:
> @@ -88,6 +90,7 @@ allOf:
> contains:
> enum:
> - sifive,fu740-c000-ccache
> + - starfive,jh7100-ccache
> - starfive,jh7110-ccache
> - microchip,mpfs-ccache
>
> @@ -111,6 +114,7 @@ allOf:
> contains:
> enum:
> - sifive,fu740-c000-ccache
> + - starfive,jh7100-ccache
> - starfive,jh7110-ccache
>
> then:
> --
> 2.40.1
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20231026/e3d79817/attachment.sig>
More information about the linux-riscv
mailing list