[PATCH v1 29/30] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW

Conor Dooley conor at kernel.org
Fri Sep 30 14:41:23 PDT 2022


On Fri, Sep 30, 2022 at 09:54:14PM +0100, Ben Dooks wrote:
> On 30/09/2022 10:06, Hal Feng wrote:
> > Add CONFIG_SERIAL_8250_DW=y, which is a necessary option for
> > StarFive JH7110 and JH7100 SoCs to boot with serial ports.
> > 
> > Signed-off-by: Hal Feng <hal.feng at linux.starfivetech.com>
> 
> That might be useful for other users at some point an I don't
> think it adds much code.

Honestly I think this should be applied for 6.1, for parity with the
other SoCs that have their serial console enabled by default.

Reviewed-by: Conor Dooley <conor.dooley at microchip.com>

Thanks,
Conor.

> 
> > ---
> >   arch/riscv/configs/defconfig | 1 +
> >   1 file changed, 1 insertion(+)
> > 
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index aed332a9d4ea..0c44484cd3a4 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -122,6 +122,7 @@ CONFIG_MICROSEMI_PHY=y
> >   CONFIG_INPUT_MOUSEDEV=y
> >   CONFIG_SERIAL_8250=y
> >   CONFIG_SERIAL_8250_CONSOLE=y
> > +CONFIG_SERIAL_8250_DW=y
> >   CONFIG_SERIAL_OF_PLATFORM=y
> >   CONFIG_VIRTIO_CONSOLE=y
> >   CONFIG_HW_RANDOM=y
> 
> -- 
> Ben Dooks				http://www.codethink.co.uk/
> Senior Engineer				Codethink - Providing Genius
> 
> https://www.codethink.co.uk/privacy.html
> 
> 
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