[PATCH v1 17/30] dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings

[Hal Feng]

On Fri, 30 Sep 2022 12:58:12 +0200, Krzysztof Kozlowski wrote:
> On 30/09/2022 00:26, Hal Feng wrote:
> > From: Emil Renner Berthing <kernel at esmil.dk>
> > 
> > Add bindings for the system clock generator on the JH7110
> > RISC-V SoC by StarFive Technology Ltd.
> > 
> > Signed-off-by: Emil Renner Berthing <kernel at esmil.dk>
> > Signed-off-by: Hal Feng <hal.feng at linux.starfivetech.com>
> 
> (...)
> 
> > +  '#clock-cells':
> > +    const: 1
> > +    description:
> > +      See <dt-bindings/clock/starfive-jh7110-sys.h> for valid indices.
> > +
> > +required:
> > +  - compatible
> > +  - clocks
> > +  - clock-names
> > +  - '#clock-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    syscrg_clk: clock-controller at 13020000 {
> 
> Does not look like you tested the bindings. Please run `make
> dt_binding_check` (see
> Documentation/devicetree/bindings/writing-schema.rst for instructions).

Will rewrite the bindings and test them. Thanks.

Best regards,
Hal