[PATCH v2] riscv: dts: canaan: Fix SPI3 bus width

[Damien Le Moal]

On 3/8/22 22:28, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel at wdc.com>
> 
> According to the K210 Standalone SDK Programming guide:
> https://canaan-creative.com/wp-content/uploads/2020/03/kendryte_standalone_programming_guide_20190311144158_en.pdf
> 
> Section 15.4.3.3:
> SPI0 and SPI1 supports: standard, dual, quad and octal transfers.
> SPI3 supports: standard, dual and quad transfers (octal is not supported).
> 
> In order to support quad transfers (Quad SPI), SPI3 must have four IO wires
> connected to the SPI flash.
> 
> Update the device tree to specify the correct bus width.
> 
> Tested on maix bit, maix dock and maixduino, which all have the same
> SPI flash (gd25lq128d) connected to SPI3. maix go is untested, but it
> would not make sense for this k210 board to be designed differently.
> 
> Signed-off-by: Niklas Cassel <niklas.cassel at wdc.com>

Looks OK to me.

Reviewed-by: Damien Le Moal <damien.lemoal at opensource.wdc.com>

> ---
> Changes since v1:
> -Add the new properties directly after spi-max-frequency for all DT board
>  files.
> 
>  arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts  | 2 ++
>  arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts | 2 ++
>  arch/riscv/boot/dts/canaan/sipeed_maix_go.dts   | 2 ++
>  arch/riscv/boot/dts/canaan/sipeed_maixduino.dts | 2 ++
>  4 files changed, 8 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts
> index 984872f3d3a9..b9e30df127fe 100644
> --- a/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts
> +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts
> @@ -203,6 +203,8 @@ flash at 0 {
>  		compatible = "jedec,spi-nor";
>  		reg = <0>;
>  		spi-max-frequency = <50000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
>  		m25p,fast-read;
>  		broken-flash-reset;
>  	};
> diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts
> index 7ba99b4da304..8d23401b0bbb 100644
> --- a/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts
> +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts
> @@ -205,6 +205,8 @@ flash at 0 {
>  		compatible = "jedec,spi-nor";
>  		reg = <0>;
>  		spi-max-frequency = <50000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
>  		m25p,fast-read;
>  		broken-flash-reset;
>  	};
> diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_go.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_go.dts
> index be9b12c9b374..24fd83b43d9d 100644
> --- a/arch/riscv/boot/dts/canaan/sipeed_maix_go.dts
> +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_go.dts
> @@ -213,6 +213,8 @@ flash at 0 {
>  		compatible = "jedec,spi-nor";
>  		reg = <0>;
>  		spi-max-frequency = <50000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
>  		m25p,fast-read;
>  		broken-flash-reset;
>  	};
> diff --git a/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts
> index 031c0c28f819..25341f38292a 100644
> --- a/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts
> +++ b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts
> @@ -178,6 +178,8 @@ flash at 0 {
>  		compatible = "jedec,spi-nor";
>  		reg = <0>;
>  		spi-max-frequency = <50000000>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
>  		m25p,fast-read;
>  		broken-flash-reset;
>  	};


-- 
Damien Le Moal
Western Digital Research