[PATCH v2 1/4] riscv, mm: detect svnapot cpu support at runtime

潘庆霖 panqinglin2020 at iscas.ac.cn
Sat Jul 16 06:42:26 PDT 2022


> >  
> > +config SVNAPOT
> > + bool "Svnapot support"
> 
> Do we add an config opition for each isa extension? That's not
> necessary. I think we'd better remove this CONFIG option and keep
> unified Image in mind.
> 

I am also not very sure about necessity of this. Maybe we should allow user to disable
Svnapot support manually? As this support may introduce extra overhead in functions
like pte_pfn. So should such option be reserved for setting it off manually? If it should not,
I will remove it in a newer version.

> > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> > index 9e2888dbb5b1..84ad32075637 100644
> > --- a/arch/riscv/include/asm/errata_list.h
> > +++ b/arch/riscv/include/asm/errata_list.h
> > @@ -20,7 +20,8 @@
> >  #endif
> >  
> >  #define CPUFEATURE_SVPBMT 0
> > -#define CPUFEATURE_NUMBER 1
> > +#define CPUFEATURE_SVNAPOT 1
> > +#define CPUFEATURE_NUMBER 2
> >  
> >  #ifdef __ASSEMBLY__
> >  
> > @@ -93,6 +94,27 @@ asm volatile(ALTERNATIVE(      \
> >  #define ALT_THEAD_PMA(_val)
> >  #endif
> >  
> > +#define ALT_SVNAPOT(_val)      \
> 
> I believe SVNAPOT can be supported w/o ALTERNATIVE, static key mechanism
> would be much simpler.
>

Thanks for the hint, will implement it with static key mechanism in a newer version.

Thanks,
Qinglin

> > +asm(ALTERNATIVE("li %0, 0", "li %0, 1", 0,    \
> > +  CPUFEATURE_SVNAPOT, CONFIG_SVNAPOT)   \
> > +  : "=r"(_val) :)
> > +
> > +#define ALT_SVNAPOT_PTE_PFN(_val, _napot_shift, _pfn_mask, _pfn_shift) \
> > +asm(ALTERNATIVE("and %0, %1, %2\n\t"     \
> > +  "srli %0, %0, %3\n\t"     \
> > +  "nop\n\tnop\n\tnop",     \
> > +  "srli t3, %1, %4\n\t"     \
> > +  "and %0, %1, %2\n\t"     \
> > +  "srli %0, %0, %3\n\t"     \
> > +  "sub  t4, %0, t3\n\t"     \
> > +  "and  %0, %0, t4",     \
> > +  0, CPUFEATURE_SVNAPOT, CONFIG_SVNAPOT)   \
> > +  : "+r"(_val)      \
> > +  : "r"(_val),      \
> > +    "r"(_pfn_mask),     \
> > +    "i"(_pfn_shift),     \
> > +    "i"(_napot_shift))
> > +
> >  #endif /* __ASSEMBLY__ */
> >  
> >  #endif




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