[PATCH/RFC 0/4] Fix RISC-V's arch-topology reporting
Conor.Dooley at microchip.com
Conor.Dooley at microchip.com
Thu Jul 7 15:06:30 PDT 2022
On 07/07/2022 23:04, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> Hey all,
> It's my first time messing around with arch/ code at all, let alone
> more than one arch, so forgive me if I have screwed up how to do a
> migration like this.
>
> The goal here is the fix the incorrectly reported arch topology on
> RISC-V which seems to have been broken since it was added.
> cpu, package and thread IDs are all currently reported as -1, so tools
> like lstopo think systems have multiple threads on the same core when
> this is not true:
> https://github.com/open-mpi/hwloc/issues/536
>
> Because I want to backport that fix, I implemented store_cpu_topology
> for RISC-V before migrating to the generic version which seems to have
> just complicated things, but was Sudeep's preferred way of doing it.
>
> Palmer, I have not marked the first patch as RFC because I would like
> it to be taken as a fix for 5.19-rc(late) independently of the rest if
> possible.
Apparently I forgot to swap RFC for PATCH on it, but point still stands.
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