[PATCH v5 0/4] RISC-V: Create unique identification for SoC PMU

[Will Deacon]

On Tue, 28 Jun 2022 14:45:54 +0300, Nikita Shubin wrote:
> From: Nikita Shubin <n.shubin at yadro.com>
> 
> From: Nikita Shubin <n.shubin at yadro.com>
> 
> This series aims to provide matching vendor SoC with corresponded JSON bindings.
> 
> The ID string is proposed to be in form of MVENDORID-MARCHID-MIMPID, for example
> for Sifive Unmatched the corresponding string will be:
> 
> [...]

Applied first patch only to will (for-next/perf), thanks!

[1/4] drivers/perf: riscv_pmu_sbi: perf format
      https://git.kernel.org/will/c/26fabd6d2ffc

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev