[PATCH v6 1/1] gpio: mpfs: add polarfire soc gpio support

Linus Walleij linus.walleij at linaro.org
Wed Aug 31 06:19:38 PDT 2022


On Tue, Aug 30, 2022 at 6:51 AM <Lewis.Hanly at microchip.com> wrote:

> We had looked at the bpgpio_init, our controller is not fully memory
> mapped to support the bgpio_init() and get all routines for free.
> While we have in/out and intr (interrupt state) 32-bit registers, we
> would not get as much free as other generic memory mapped controllers.

You're not really saying what the problem is?

Is it that some registers are not one-bit-indexed from 0 per GPIO?

Yours,
Linus Walleij



More information about the linux-riscv mailing list