[PATCH v2] drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores

[Heiko Stübner]

Am Dienstag, 30. August 2022, 16:33:27 CEST schrieb Heiko Stübner:
> Am Freitag, 26. August 2022, 19:57:33 CEST schrieb Conor.Dooley at microchip.com:
> > On 26/08/2022 17:35, Heiko Stuebner wrote:
> > > diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
> > > index 202c83f677b2..e6101eab25c8 100644
> > > --- a/arch/riscv/errata/thead/errata.c
> > > +++ b/arch/riscv/errata/thead/errata.c
> > > @@ -44,6 +44,22 @@ static bool errata_probe_cmo(unsigned int stage,
> > >  #endif
> > >  }
> > > 
> > > +static bool errata_probe_pmu(unsigned int stage,
> > > +                            unsigned long arch_id, unsigned long impid)
> > > +{
> > > +#ifdef CONFIG_ERRATA_THEAD_PMU
> > 
> > Is there a reason that all the alternatives use ifdef
> > rather than if(IS_ENABLED())?
> 
> no real reason I guess - more like not enough thinking :-)
> 
> Using IS_ENABLED also makes it way nicer as we can just do
> 
> 	if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PMU))
> 		return false;

Though at least for the CMO this is not possible, as the
	riscv_noncoherent_supported()
is not defined in that case.

Though it might be nice to define a stub for the
not-CONFIG_RISCV_DMA_NONCOHERENT case
so that we don't need to #ifdef around it.