[PATCH v3 1/3] perf: RISC-V: fix access beyond allocated array
Sergey Matyukevich
geomatsi at gmail.com
Fri Aug 26 13:34:41 PDT 2022
From: Sergey Matyukevich <sergey.matyukevich at syntacore.com>
The root cause could be related to the interpretation of the number of
counters reported by SBI firmware. For instance, if we assume that unused
timer counter with index 1 is not reported, then the range is correct
and larger array needs to be allocated.
This is not the case though since SBI firmware is supposed to report the
total number of firmware and hardware counters including special or
unused ones like the timer counter. So just fix the range in for-loop.
Signed-off-by: Sergey Matyukevich <sergey.matyukevich at syntacore.com>
Reviewed-by: Atish Patra <atishp at rivosinc.com>
---
drivers/perf/riscv_pmu_sbi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 6f6681bbfd36..8de4ca2fef21 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -473,7 +473,7 @@ static int pmu_sbi_get_ctrinfo(int nctr)
if (!pmu_ctr_list)
return -ENOMEM;
- for (i = 0; i <= nctr; i++) {
+ for (i = 0; i < nctr; i++) {
ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_GET_INFO, i, 0, 0, 0, 0, 0);
if (ret.error)
/* The logical counter ids are not expected to be contiguous */
--
2.37.1
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